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<div class="title">XDualSplitter_Config Struct Reference<div class="ingroups"><a class="el" href="group__dual__splitter__v1__0.html">Dual_splitter_v1_0</a></div></div>  </div>
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<p>This typedef contains configuration information for the Dual Splitter core.  
 <a href="struct_x_dual_splitter___config.html#details">More...</a></p>
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Data Fields</h2></td></tr>
<tr class="memitem:a0681ec1d73a3625c4a9e50ee91f60728"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#a0681ec1d73a3625c4a9e50ee91f60728">DeviceId</a></td></tr>
<tr class="memdesc:a0681ec1d73a3625c4a9e50ee91f60728"><td class="mdescLeft">&#160;</td><td class="mdescRight">DeviceId is the unique ID of the Dual Splitter core.  <a href="#a0681ec1d73a3625c4a9e50ee91f60728">More...</a><br /></td></tr>
<tr class="separator:a0681ec1d73a3625c4a9e50ee91f60728"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3da7ad4f8e876ab73acc8c72274ea0f6"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#a3da7ad4f8e876ab73acc8c72274ea0f6">BaseAddress</a></td></tr>
<tr class="memdesc:a3da7ad4f8e876ab73acc8c72274ea0f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">BaseAddress is the physical base address of the core's registers.  <a href="#a3da7ad4f8e876ab73acc8c72274ea0f6">More...</a><br /></td></tr>
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<tr class="memitem:a5767a958a21deb63eca5e479e249260c"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#a5767a958a21deb63eca5e479e249260c">ActiveCols</a></td></tr>
<tr class="memdesc:a5767a958a21deb63eca5e479e249260c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active Maximum Image Width.  <a href="#a5767a958a21deb63eca5e479e249260c">More...</a><br /></td></tr>
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<tr class="memitem:a85c7e13225c5a5522b3907806bdc9491"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#a85c7e13225c5a5522b3907806bdc9491">ActiveRows</a></td></tr>
<tr class="memdesc:a85c7e13225c5a5522b3907806bdc9491"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active Maximum Image Height.  <a href="#a85c7e13225c5a5522b3907806bdc9491">More...</a><br /></td></tr>
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<tr class="memitem:afeb1fef1827c6345854ee71667748f1a"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#afeb1fef1827c6345854ee71667748f1a">MaxSegments</a></td></tr>
<tr class="memdesc:afeb1fef1827c6345854ee71667748f1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum number of segments in an image.  <a href="#afeb1fef1827c6345854ee71667748f1a">More...</a><br /></td></tr>
<tr class="separator:afeb1fef1827c6345854ee71667748f1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3ecbce61afe25996389837f7d416254f"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#a3ecbce61afe25996389837f7d416254f">MaxTDataWidth</a></td></tr>
<tr class="memdesc:a3ecbce61afe25996389837f7d416254f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Data bus Width.  <a href="#a3ecbce61afe25996389837f7d416254f">More...</a><br /></td></tr>
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<tr class="memitem:a947ea9cc89838d114c897275288054a8"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#a947ea9cc89838d114c897275288054a8">MaxITDataSamples</a></td></tr>
<tr class="memdesc:a947ea9cc89838d114c897275288054a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Input Data Samples per clock.  <a href="#a947ea9cc89838d114c897275288054a8">More...</a><br /></td></tr>
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<tr class="memitem:a154df5a421e0802875ef0f8ce09bcf4d"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#a154df5a421e0802875ef0f8ce09bcf4d">MaxOTDataSamples</a></td></tr>
<tr class="memdesc:a154df5a421e0802875ef0f8ce09bcf4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Output Data Samples per clock.  <a href="#a154df5a421e0802875ef0f8ce09bcf4d">More...</a><br /></td></tr>
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<tr class="memitem:ad14700785f7760d0aa6fac84b851fd6a"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#ad14700785f7760d0aa6fac84b851fd6a">MaxOverlap</a></td></tr>
<tr class="memdesc:ad14700785f7760d0aa6fac84b851fd6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Overlap of the samples in the segments.  <a href="#ad14700785f7760d0aa6fac84b851fd6a">More...</a><br /></td></tr>
<tr class="separator:ad14700785f7760d0aa6fac84b851fd6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a08b7e0195efc167381ad64ef46932d65"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#a08b7e0195efc167381ad64ef46932d65">MaxSampleWidth</a></td></tr>
<tr class="memdesc:a08b7e0195efc167381ad64ef46932d65"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum number of bits in a Sample.  <a href="#a08b7e0195efc167381ad64ef46932d65">More...</a><br /></td></tr>
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<tr class="memitem:aeb4b36b9c35d5c299f37c65b3cc4aa79"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#aeb4b36b9c35d5c299f37c65b3cc4aa79">HasAxi4Lite</a></td></tr>
<tr class="memdesc:aeb4b36b9c35d5c299f37c65b3cc4aa79"><td class="mdescLeft">&#160;</td><td class="mdescRight">Axi4-Lite support.  <a href="#aeb4b36b9c35d5c299f37c65b3cc4aa79">More...</a><br /></td></tr>
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<tr class="memitem:a0a9073578b8b05a9d3c3ae49f1b7ac7f"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dual_splitter___config.html#a0a9073578b8b05a9d3c3ae49f1b7ac7f">HasIntrReq</a></td></tr>
<tr class="memdesc:a0a9073578b8b05a9d3c3ae49f1b7ac7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">IRQ support.  <a href="#a0a9073578b8b05a9d3c3ae49f1b7ac7f">More...</a><br /></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>This typedef contains configuration information for the Dual Splitter core. </p>
<p>Each Dual Splitter device should have a configuration structure associated. </p>
</div><h2 class="groupheader">Field Documentation</h2>
<a id="a5767a958a21deb63eca5e479e249260c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5767a958a21deb63eca5e479e249260c">&#9670;&nbsp;</a></span>ActiveCols</h2>

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<p>Active Maximum Image Width. </p>

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<a id="a85c7e13225c5a5522b3907806bdc9491"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a85c7e13225c5a5522b3907806bdc9491">&#9670;&nbsp;</a></span>ActiveRows</h2>

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<p>Active Maximum Image Height. </p>

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<a id="a3da7ad4f8e876ab73acc8c72274ea0f6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3da7ad4f8e876ab73acc8c72274ea0f6">&#9670;&nbsp;</a></span>BaseAddress</h2>

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<p>BaseAddress is the physical base address of the core's registers. </p>

<p class="reference">Referenced by <a class="el" href="group__dual__splitter__v1__0.html#gae802302ea4de37154e36cbe0993e8cfd">XDualSplitter_CfgInitialize()</a>, <a class="el" href="group__dual__splitter__v1__0.html#gaabda56798dc29e25c03eb5098ba60850">XDualSplitter_GetImageSize()</a>, <a class="el" href="group__dual__splitter__v1__0.html#gaf9b807d631f1491dcd23add904e40049">XDualSplitter_GetImgParam()</a>, <a class="el" href="group__dual__splitter__v1__0.html#ga9cb1484d45dfd8caeba7b82f3cb57d26">XDualSplitter_Reset()</a>, <a class="el" href="group__dual__splitter__v1__0.html#ga134facdfb0255d7de8f17cccf404349b">XDualSplitter_SetImageSize()</a>, <a class="el" href="group__dual__splitter__v1__0.html#gab4b2ff70f887d9e406ab83d7c23e19a0">XDualSplitter_SetImgParam()</a>, and <a class="el" href="xdualsplitter__example_8c.html#a42e5da16cadf070754de53ee38e934b2">XDualSplitterExample()</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#a0681ec1d73a3625c4a9e50ee91f60728">&#9670;&nbsp;</a></span>DeviceId</h2>

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          <td class="memname">u16 XDualSplitter_Config::DeviceId</td>
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<p>DeviceId is the unique ID of the Dual Splitter core. </p>

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<a id="aeb4b36b9c35d5c299f37c65b3cc4aa79"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aeb4b36b9c35d5c299f37c65b3cc4aa79">&#9670;&nbsp;</a></span>HasAxi4Lite</h2>

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<p>Axi4-Lite support. </p>

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<a id="a0a9073578b8b05a9d3c3ae49f1b7ac7f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a0a9073578b8b05a9d3c3ae49f1b7ac7f">&#9670;&nbsp;</a></span>HasIntrReq</h2>

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<p>IRQ support. </p>

<p class="reference">Referenced by <a class="el" href="group__dual__splitter__v1__0.html#ga040c43cf8292cad54fad4111a7af19c3">XDualSplitter_IntrHandler()</a>.</p>

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<a id="a947ea9cc89838d114c897275288054a8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a947ea9cc89838d114c897275288054a8">&#9670;&nbsp;</a></span>MaxITDataSamples</h2>

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<p>Maximum Input Data Samples per clock. </p>

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<a id="a154df5a421e0802875ef0f8ce09bcf4d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a154df5a421e0802875ef0f8ce09bcf4d">&#9670;&nbsp;</a></span>MaxOTDataSamples</h2>

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<p>Maximum Output Data Samples per clock. </p>

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<a id="ad14700785f7760d0aa6fac84b851fd6a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad14700785f7760d0aa6fac84b851fd6a">&#9670;&nbsp;</a></span>MaxOverlap</h2>

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<p>Maximum Overlap of the samples in the segments. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a08b7e0195efc167381ad64ef46932d65">&#9670;&nbsp;</a></span>MaxSampleWidth</h2>

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<p>Maximum number of bits in a Sample. </p>

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<a id="afeb1fef1827c6345854ee71667748f1a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#afeb1fef1827c6345854ee71667748f1a">&#9670;&nbsp;</a></span>MaxSegments</h2>

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<p>Maximum number of segments in an image. </p>

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<a id="a3ecbce61afe25996389837f7d416254f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3ecbce61afe25996389837f7d416254f">&#9670;&nbsp;</a></span>MaxTDataWidth</h2>

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<p>Maximum Data bus Width. </p>
<p>It is the multiplication of maximum input sample width and maximum input samples per clock </p>

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